Configurable FPGA-Based Outlier Detection for Time Series Data

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  • Additional Information
    • Publication Information:
      IEEE
    • Publication Date:
      2020
    • Abstract:
      An outlier detection technique based on joint estimation of model parameters and outlier effects in time series is implemented in FPGA-based configurable real-time outlier detection hardware. The hardware models time series data with an autoregressive-moving-average (ARMA) process and identifies the outliers based on test statistics using unbiased parameters. A configurable hardware implementation was written in Verilog, simulated to verify its correctness, and synthesized on an Altera FPGA device from the Stratix V family. The design is configurable by adjusting the number of iterations for the optimization process, the number of samples in the time series data, and the critical value. A reported configuration of this design has a total power dissipation of 1.14W, while processing 35 million data points per second, giving an energy usage of 32 nJ per processed data point. The implemented hardware is capable of detecting multiple additive outliers in time series data with a detection accuracy of 99% and has a type I error rate of 1.05%. Compared to a general purpose CPU running a software implementation of the outlier detection algorithm, the FPGA implementation reduces the power consumption by 89% at similar rates of data throughput.
    • Contents Note:
      Conference Acronym: MWSCAS
    • Author Affiliations:
      Carleton University,Department of Electronics,Ottawa,Canada,KIS 5B6
    • ISBN:
      978-1-7281-8058-8
    • ISSN:
      1558-3899
    • Relation:
      2020 IEEE 63rd International Midwest Symposium on Circuits and Systems (MWSCAS)
    • Accession Number:
      10.1109/MWSCAS48704.2020.9184548
    • Rights:
      Copyright 2020, IEEE
    • AMSID:
      9184548
    • Conference Acronym:
      MWSCAS
    • Date of Current Version:
      2020
    • Document Subtype:
      IEEE Conference
    • Notes:
      Conference Location: Springfield, MA, USA, USA

      Conference Start Date: 9 Aug. 2020

      Conference End Date: 12 Aug. 2020
    • Accession Number:
      edseee.9184548
  • Citations
    • ABNT:
      MACEACHERN, L.; VAZHBAKHT, G. Configurable FPGA-Based Outlier Detection for Time Series Data. 2020 IEEE 63rd International Midwest Symposium on Circuits and Systems (MWSCAS), Circuits and Systems (MWSCAS), 2020 IEEE 63rd International Midwest Symposium on, [s. l.], p. 142–145, 2020. DOI 10.1109/MWSCAS48704.2020.9184548. Disponível em: http://search.ebscohost.com/login.aspx?direct=true&site=eds-live&db=edseee&AN=edseee.9184548. Acesso em: 20 out. 2020.
    • AMA:
      MacEachern L, Vazhbakht G. Configurable FPGA-Based Outlier Detection for Time Series Data. 2020 IEEE 63rd International Midwest Symposium on Circuits and Systems (MWSCAS), Circuits and Systems (MWSCAS), 2020 IEEE 63rd International Midwest Symposium on. August 2020:142-145. doi:10.1109/MWSCAS48704.2020.9184548
    • APA:
      MacEachern, L., & Vazhbakht, G. (2020). Configurable FPGA-Based Outlier Detection for Time Series Data. 2020 IEEE 63rd International Midwest Symposium on Circuits and Systems (MWSCAS), Circuits and Systems (MWSCAS), 2020 IEEE 63rd International Midwest Symposium On, 142–145. https://doi.org/10.1109/MWSCAS48704.2020.9184548
    • Chicago/Turabian: Author-Date:
      MacEachern, Leonard, and Ghazaleh Vazhbakht. 2020. “Configurable FPGA-Based Outlier Detection for Time Series Data.” 2020 IEEE 63rd International Midwest Symposium on Circuits and Systems (MWSCAS), Circuits and Systems (MWSCAS), 2020 IEEE 63rd International Midwest Symposium On, August, 142–45. doi:10.1109/MWSCAS48704.2020.9184548.
    • Harvard:
      MacEachern, L. and Vazhbakht, G. (2020) ‘Configurable FPGA-Based Outlier Detection for Time Series Data’, 2020 IEEE 63rd International Midwest Symposium on Circuits and Systems (MWSCAS), Circuits and Systems (MWSCAS), 2020 IEEE 63rd International Midwest Symposium on, pp. 142–145. doi: 10.1109/MWSCAS48704.2020.9184548.
    • Harvard: Australian:
      MacEachern, L & Vazhbakht, G 2020, ‘Configurable FPGA-Based Outlier Detection for Time Series Data’, 2020 IEEE 63rd International Midwest Symposium on Circuits and Systems (MWSCAS), Circuits and Systems (MWSCAS), 2020 IEEE 63rd International Midwest Symposium on, pp. 142–145, viewed 20 October 2020, .
    • MLA:
      MacEachern, Leonard, and Ghazaleh Vazhbakht. “Configurable FPGA-Based Outlier Detection for Time Series Data.” 2020 IEEE 63rd International Midwest Symposium on Circuits and Systems (MWSCAS), Circuits and Systems (MWSCAS), 2020 IEEE 63rd International Midwest Symposium On, Aug. 2020, pp. 142–145. EBSCOhost, doi:10.1109/MWSCAS48704.2020.9184548.
    • Chicago/Turabian: Humanities:
      MacEachern, Leonard, and Ghazaleh Vazhbakht. “Configurable FPGA-Based Outlier Detection for Time Series Data.” 2020 IEEE 63rd International Midwest Symposium on Circuits and Systems (MWSCAS), Circuits and Systems (MWSCAS), 2020 IEEE 63rd International Midwest Symposium On, August 1, 2020, 142–45. doi:10.1109/MWSCAS48704.2020.9184548.
    • Vancouver/ICMJE:
      MacEachern L, Vazhbakht G. Configurable FPGA-Based Outlier Detection for Time Series Data. 2020 IEEE 63rd International Midwest Symposium on Circuits and Systems (MWSCAS), Circuits and Systems (MWSCAS), 2020 IEEE 63rd International Midwest Symposium on [Internet]. 2020 Aug 1 [cited 2020 Oct 20];142–5. Available from: http://search.ebscohost.com/login.aspx?direct=true&site=eds-live&db=edseee&AN=edseee.9184548