The Floating NBL Architecture: Enabler of a Quasi-SOI process

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  • Additional Information
    • Publication Information:
      IEEE
    • Publication Date:
      2020
    • Abstract:
      The floating buried layer isolation architecture enables a cost reduction of high-voltage Bulk BCD technologies, while providing circuit designers with a footprint and degrees of freedom similar to SOI, without its disadvantages. The concept embraces parasitics, rather than fighting or avoiding them, and replaces observability and full controllability of all potentials by a self-organizing principle governed by Kirchhoff’s law.
    • Contents Note:
      Conference Acronym: ISPSD
    • Author Affiliations:
      Advanced Solutions Group, Automotive BU Research & Development ON Semiconductor,Mechelen,Belgium
    • ISBN:
      978-1-7281-4836-6
    • ISSN:
      1946-0201
    • Relation:
      2020 32nd International Symposium on Power Semiconductor Devices and ICs (ISPSD)
    • Accession Number:
      10.1109/ISPSD46842.2020.9170056
    • Rights:
      Copyright 2020, IEEE
    • AMSID:
      9170056
    • Conference Acronym:
      ISPSD
    • Date of Current Version:
      2020
    • Document Subtype:
      IEEE Conference
    • Notes:
      Conference Location: Vienna, Austria, Austria

      Conference Start Date: 13 Sept. 2020

      Conference End Date: 18 Sept. 2020
    • Accession Number:
      edseee.9170056
  • Citations
    • ABNT:
      JANSSENS, J. The Floating NBL Architecture: Enabler of a Quasi-SOI process. 2020 32nd International Symposium on Power Semiconductor Devices and ICs (ISPSD), Power Semiconductor Devices and ICs (ISPSD), 2020 32nd International Symposium on, [s. l.], p. 423–426, 2020. DOI 10.1109/ISPSD46842.2020.9170056. Disponível em: http://search.ebscohost.com/login.aspx?direct=true&site=eds-live&db=edseee&AN=edseee.9170056. Acesso em: 30 out. 2020.
    • AMA:
      Janssens J. The Floating NBL Architecture: Enabler of a Quasi-SOI process. 2020 32nd International Symposium on Power Semiconductor Devices and ICs (ISPSD), Power Semiconductor Devices and ICs (ISPSD), 2020 32nd International Symposium on. September 2020:423-426. doi:10.1109/ISPSD46842.2020.9170056
    • APA:
      Janssens, J. (2020). The Floating NBL Architecture: Enabler of a Quasi-SOI process. 2020 32nd International Symposium on Power Semiconductor Devices and ICs (ISPSD), Power Semiconductor Devices and ICs (ISPSD), 2020 32nd International Symposium On, 423–426. https://doi.org/10.1109/ISPSD46842.2020.9170056
    • Chicago/Turabian: Author-Date:
      Janssens, Johan. 2020. “The Floating NBL Architecture: Enabler of a Quasi-SOI Process.” 2020 32nd International Symposium on Power Semiconductor Devices and ICs (ISPSD), Power Semiconductor Devices and ICs (ISPSD), 2020 32nd International Symposium On, September, 423–26. doi:10.1109/ISPSD46842.2020.9170056.
    • Harvard:
      Janssens, J. (2020) ‘The Floating NBL Architecture: Enabler of a Quasi-SOI process’, 2020 32nd International Symposium on Power Semiconductor Devices and ICs (ISPSD), Power Semiconductor Devices and ICs (ISPSD), 2020 32nd International Symposium on, pp. 423–426. doi: 10.1109/ISPSD46842.2020.9170056.
    • Harvard: Australian:
      Janssens, J 2020, ‘The Floating NBL Architecture: Enabler of a Quasi-SOI process’, 2020 32nd International Symposium on Power Semiconductor Devices and ICs (ISPSD), Power Semiconductor Devices and ICs (ISPSD), 2020 32nd International Symposium on, pp. 423–426, viewed 30 October 2020, .
    • MLA:
      Janssens, Johan. “The Floating NBL Architecture: Enabler of a Quasi-SOI Process.” 2020 32nd International Symposium on Power Semiconductor Devices and ICs (ISPSD), Power Semiconductor Devices and ICs (ISPSD), 2020 32nd International Symposium On, Sept. 2020, pp. 423–426. EBSCOhost, doi:10.1109/ISPSD46842.2020.9170056.
    • Chicago/Turabian: Humanities:
      Janssens, Johan. “The Floating NBL Architecture: Enabler of a Quasi-SOI Process.” 2020 32nd International Symposium on Power Semiconductor Devices and ICs (ISPSD), Power Semiconductor Devices and ICs (ISPSD), 2020 32nd International Symposium On, September 1, 2020, 423–26. doi:10.1109/ISPSD46842.2020.9170056.
    • Vancouver/ICMJE:
      Janssens J. The Floating NBL Architecture: Enabler of a Quasi-SOI process. 2020 32nd International Symposium on Power Semiconductor Devices and ICs (ISPSD), Power Semiconductor Devices and ICs (ISPSD), 2020 32nd International Symposium on [Internet]. 2020 Sep 1 [cited 2020 Oct 30];423–6. Available from: http://search.ebscohost.com/login.aspx?direct=true&site=eds-live&db=edseee&AN=edseee.9170056