Error Coverage, Reliability and Cost Analysis of Fault Tolerance Techniques for 32-bit Memories used on Space Missions

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  • Additional Information
    • Publication Information:
      IEEE
    • Publication Date:
      2020
    • Abstract:
      As the supply voltage decreases, the sensitivity of the integrated circuits to radiation increases dramatically, affecting various components such as memory cells. This paper presents, implements, and discusses seven Error Correction Code (ECC) configurations for use in 32-bit memories designed for space missions. We evaluated the proposed ECC configurations injecting two sets of faults: (i) adjacent bitflips and (ii) all possible combinations in 32-bit memory up to five bitflips. The adjacent bitflips evaluation shows that Triple Modular Redundancy with Interleaving reaches the highest correction rates, except for three and four bitflips, and the Hamming code with interleaving obtained the highest reliability. Furthermore, the evaluation of all possible combinations in a 32-bit memory shows that Reed-Muller code outperformed all other ECCs by up to three upsets and had the best reliability of all.
    • Contents Note:
      Conference Acronym: ISQED
    • Author Affiliations:
      Engineering and Computer Systems Laboratory (LESC), Federal University of Ceará,Fortaleza,Brazil
      Pontifical Catholic University of Rio Grande do Sul (PUC-RS),Porto Alegre,Brazil
      Wireless Telecommunications Research Group (GTEL), Federal University of Ceará,Fortaleza,Brazil
    • ISBN:
      978-1-7281-4207-4
      978-1-7281-5361-2
    • Relation:
      2020 21st International Symposium on Quality Electronic Design (ISQED)
    • Accession Number:
      10.1109/ISQED48828.2020.9137019
    • Rights:
      Copyright 2020, IEEE
    • AMSID:
      9137019
    • Conference Acronym:
      ISQED
    • Date of Current Version:
      2020
    • Document Subtype:
      IEEE Conference
    • Notes:
      Conference Location: Santa Clara, CA, USA, USA

      Conference Start Date: 25 March 2020

      Conference End Date: 26 March 2020
    • Accession Number:
      edseee.9137019
  • Citations
    • ABNT:
      FREITAS, D. C. C. et al. Error Coverage, Reliability and Cost Analysis of Fault Tolerance Techniques for 32-bit Memories used on Space Missions. 2020 21st International Symposium on Quality Electronic Design (ISQED), Quality Electronic Design (ISQED), 2020 21st International Symposium on, [s. l.], p. 250–254, 2020. DOI 10.1109/ISQED48828.2020.9137019. Disponível em: http://search.ebscohost.com/login.aspx?direct=true&site=eds-live&db=edseee&AN=edseee.9137019. Acesso em: 20 set. 2020.
    • AMA:
      Freitas DCC, Mota D, Simoes D, et al. Error Coverage, Reliability and Cost Analysis of Fault Tolerance Techniques for 32-bit Memories used on Space Missions. 2020 21st International Symposium on Quality Electronic Design (ISQED), Quality Electronic Design (ISQED), 2020 21st International Symposium on. March 2020:250-254. doi:10.1109/ISQED48828.2020.9137019
    • APA:
      Freitas, D. C. C., Mota, D., Simoes, D., Lopes, C., Goerl, R., Marcon, C., Silveira, J., & Mota, J. C. M. (2020). Error Coverage, Reliability and Cost Analysis of Fault Tolerance Techniques for 32-bit Memories used on Space Missions. 2020 21st International Symposium on Quality Electronic Design (ISQED), Quality Electronic Design (ISQED), 2020 21st International Symposium On, 250–254. https://doi.org/10.1109/ISQED48828.2020.9137019
    • Chicago/Turabian: Author-Date:
      Freitas, D. C. C., D. Mota, D Simoes, C. Lopes, R. Goerl, C. Marcon, J. Silveira, and J. C. M. Mota. 2020. “Error Coverage, Reliability and Cost Analysis of Fault Tolerance Techniques for 32-Bit Memories Used on Space Missions.” 2020 21st International Symposium on Quality Electronic Design (ISQED), Quality Electronic Design (ISQED), 2020 21st International Symposium On, March, 250–54. doi:10.1109/ISQED48828.2020.9137019.
    • Harvard:
      Freitas, D. C. C. et al. (2020) ‘Error Coverage, Reliability and Cost Analysis of Fault Tolerance Techniques for 32-bit Memories used on Space Missions’, 2020 21st International Symposium on Quality Electronic Design (ISQED), Quality Electronic Design (ISQED), 2020 21st International Symposium on, pp. 250–254. doi: 10.1109/ISQED48828.2020.9137019.
    • Harvard: Australian:
      Freitas, DCC, Mota, D, Simoes, D, Lopes, C, Goerl, R, Marcon, C, Silveira, J & Mota, JCM 2020, ‘Error Coverage, Reliability and Cost Analysis of Fault Tolerance Techniques for 32-bit Memories used on Space Missions’, 2020 21st International Symposium on Quality Electronic Design (ISQED), Quality Electronic Design (ISQED), 2020 21st International Symposium on, pp. 250–254, viewed 20 September 2020, .
    • MLA:
      Freitas, D. C. C., et al. “Error Coverage, Reliability and Cost Analysis of Fault Tolerance Techniques for 32-Bit Memories Used on Space Missions.” 2020 21st International Symposium on Quality Electronic Design (ISQED), Quality Electronic Design (ISQED), 2020 21st International Symposium On, Mar. 2020, pp. 250–254. EBSCOhost, doi:10.1109/ISQED48828.2020.9137019.
    • Chicago/Turabian: Humanities:
      Freitas, D. C. C., D. Mota, D Simoes, C. Lopes, R. Goerl, C. Marcon, J. Silveira, and J. C. M. Mota. “Error Coverage, Reliability and Cost Analysis of Fault Tolerance Techniques for 32-Bit Memories Used on Space Missions.” 2020 21st International Symposium on Quality Electronic Design (ISQED), Quality Electronic Design (ISQED), 2020 21st International Symposium On, March 1, 2020, 250–54. doi:10.1109/ISQED48828.2020.9137019.
    • Vancouver/ICMJE:
      Freitas DCC, Mota D, Simoes D, Lopes C, Goerl R, Marcon C, et al. Error Coverage, Reliability and Cost Analysis of Fault Tolerance Techniques for 32-bit Memories used on Space Missions. 2020 21st International Symposium on Quality Electronic Design (ISQED), Quality Electronic Design (ISQED), 2020 21st International Symposium on [Internet]. 2020 Mar 1 [cited 2020 Sep 20];250–4. Available from: http://search.ebscohost.com/login.aspx?direct=true&site=eds-live&db=edseee&AN=edseee.9137019