A XOR-based associative memory block in 28 nm CMOS for interdisciplinary applications

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  • Additional Information
    • Publication Information:
      IEEE
    • Publication Date:
      2015
    • Abstract:
      In this paper we describe a Content Addressable Memory architecture designed in 28 nm CMOS technology and based on the 65 nm XORAM cell previously developed. The cell is composed by two main blocks: a 6T SRAM, and a 4T XOR logic gate. Each XORAM cell makes a bitwise comparison between input data and stored data. The memory is organized in 18-bit words, and all the 18 XOR outputs bits must have a low logic value to trigger a high logic value of the single bit match line. A 18-input NOR gate performs this operation. The memory operation is triggered by the change of the least significant bit of the 18-bit input word, which is delayed w.r.t. the other bits. In this way, the logic does not require any clock. The proposed architecture is based on CMOS combinational logic, and it does not require any precharge operation, nor control and timing logic. The Associative Memory block is useful for several pattern recognition tasks, such as track recognition in high energy physics experiments, and image recognition for medical applications.
    • Contents Note:
      Conference Acronym: ICECS
    • Author Affiliations:
      INFN Pisa, Pisa, Italy
      Università degli Studi di Milano-Bicocca, Milano, Italy
      INFN Milano-Bicocca, Milano, Italy
      LPNHE / IN2P3 / CNRS, Paris, France
      Università degli Studi di Milano, Milano, Italy
      INFN Milano, Milano, Italy
    • ISBN:
      978-1-5090-0246-7
      978-1-5090-0245-0
    • Relation:
      2015 IEEE International Conference on Electronics, Circuits, and Systems (ICECS)
    • Accession Number:
      10.1109/ICECS.2015.7440331
    • Rights:
      Copyright 2015, IEEE
    • AMSID:
      7440331
    • AMSID Created:
      3/23/2016 12:00:00 AM
    • Conference Acronym:
      ICECS
    • Date of Current Version:
      2015
    • Document Subtype:
      IEEE Conference
    • Notes:
      Conference Location: Cairo, Egypt, Egypt

      Conference Start Date: 6 Dec. 2015

      Conference End Date: 9 Dec. 2015
    • Accession Number:
      edseee.7440331
  • Citations
    • ABNT:
      ANNOVI, A. et al. A XOR-based associative memory block in 28 nm CMOS for interdisciplinary applications. 2015 IEEE International Conference on Electronics, Circuits, and Systems (ICECS), Electronics, Circuits, and Systems (ICECS), 2015 IEEE International Conference on, [s. l.], p. 392–395, 2015. DOI 10.1109/ICECS.2015.7440331. Disponível em: http://search.ebscohost.com/login.aspx?direct=true&site=eds-live&db=edseee&AN=edseee.7440331. Acesso em: 24 out. 2020.
    • AMA:
      Annovi A, Baschirotto A, Beretta MM, et al. A XOR-based associative memory block in 28 nm CMOS for interdisciplinary applications. 2015 IEEE International Conference on Electronics, Circuits, and Systems (ICECS), Electronics, Circuits, and Systems (ICECS), 2015 IEEE International Conference on. December 2015:392-395. doi:10.1109/ICECS.2015.7440331
    • APA:
      Annovi, A., Baschirotto, A., Beretta, M. M., Biesuz, N. V., Citraro, S., Crescioli, F., De Matteis, M., Fary, F., Frontini, L., Giannetti, P., Liberali, V., Luciano, P., Palla, F., Pezzotta, A., Shojaii, S. R., Sotiropoulou, C.-L., & Stabile, A. (2015). A XOR-based associative memory block in 28 nm CMOS for interdisciplinary applications. 2015 IEEE International Conference on Electronics, Circuits, and Systems (ICECS), Electronics, Circuits, and Systems (ICECS), 2015 IEEE International Conference On, 392–395. https://doi.org/10.1109/ICECS.2015.7440331
    • Chicago/Turabian: Author-Date:
      Annovi, Alberto, Andrea Baschirotto, Matteo M. Beretta, Nicolo Vladi Biesuz, Saverio Citraro, Francesco Crescioli, Marcello De Matteis, et al. 2015. “A XOR-Based Associative Memory Block in 28 Nm CMOS for Interdisciplinary Applications.” 2015 IEEE International Conference on Electronics, Circuits, and Systems (ICECS), Electronics, Circuits, and Systems (ICECS), 2015 IEEE International Conference On, December, 392–95. doi:10.1109/ICECS.2015.7440331.
    • Harvard:
      Annovi, A. et al. (2015) ‘A XOR-based associative memory block in 28 nm CMOS for interdisciplinary applications’, 2015 IEEE International Conference on Electronics, Circuits, and Systems (ICECS), Electronics, Circuits, and Systems (ICECS), 2015 IEEE International Conference on, pp. 392–395. doi: 10.1109/ICECS.2015.7440331.
    • Harvard: Australian:
      Annovi, A, Baschirotto, A, Beretta, MM, Biesuz, NV, Citraro, S, Crescioli, F, De Matteis, M, Fary, F, Frontini, L, Giannetti, P, Liberali, V, Luciano, P, Palla, F, Pezzotta, A, Shojaii, SR, Sotiropoulou, C-L & Stabile, A 2015, ‘A XOR-based associative memory block in 28 nm CMOS for interdisciplinary applications’, 2015 IEEE International Conference on Electronics, Circuits, and Systems (ICECS), Electronics, Circuits, and Systems (ICECS), 2015 IEEE International Conference on, pp. 392–395, viewed 24 October 2020, .
    • MLA:
      Annovi, Alberto, et al. “A XOR-Based Associative Memory Block in 28 Nm CMOS for Interdisciplinary Applications.” 2015 IEEE International Conference on Electronics, Circuits, and Systems (ICECS), Electronics, Circuits, and Systems (ICECS), 2015 IEEE International Conference On, Dec. 2015, pp. 392–395. EBSCOhost, doi:10.1109/ICECS.2015.7440331.
    • Chicago/Turabian: Humanities:
      Annovi, Alberto, Andrea Baschirotto, Matteo M. Beretta, Nicolo Vladi Biesuz, Saverio Citraro, Francesco Crescioli, Marcello De Matteis, et al. “A XOR-Based Associative Memory Block in 28 Nm CMOS for Interdisciplinary Applications.” 2015 IEEE International Conference on Electronics, Circuits, and Systems (ICECS), Electronics, Circuits, and Systems (ICECS), 2015 IEEE International Conference On, December 1, 2015, 392–95. doi:10.1109/ICECS.2015.7440331.
    • Vancouver/ICMJE:
      Annovi A, Baschirotto A, Beretta MM, Biesuz NV, Citraro S, Crescioli F, et al. A XOR-based associative memory block in 28 nm CMOS for interdisciplinary applications. 2015 IEEE International Conference on Electronics, Circuits, and Systems (ICECS), Electronics, Circuits, and Systems (ICECS), 2015 IEEE International Conference on [Internet]. 2015 Dec 1 [cited 2020 Oct 24];392–5. Available from: http://search.ebscohost.com/login.aspx?direct=true&site=eds-live&db=edseee&AN=edseee.7440331